# IPCore

Create directory lab4 and create file lab4.py in created directory. Copy and paste a source code from below to the file lab4.py.

```
#!/usr/bin/env python3

from migen import *

from litex.build.generic_platform import *
from litex.build.altera import AlteraPlatform
from litex.build.altera.programmer import USBBlaster
from litex.soc.interconnect.csr import *

# IOs ----------------------------------------------------------------------------------------------

_io = [
    # Clk / Rst
    ("clk10", 0, Pins("N5"),  IOStandard("3.3-V LVTTL")),
    ("clk50", 0, Pins("P11"), IOStandard("3.3-V LVTTL")),
    ("clk50", 1, Pins("N14"), IOStandard("3.3-V LVTTL")),

    # Seven Segment
    ("seven_seg", 0, Pins("C14 E15 C15 C16 E16 D17 C17 D15"), IOStandard("3.3-V LVTTL")),
    ("seven_seg", 1, Pins("C18 D18 E18 B16 A17 A18 B17 A16"), IOStandard("3.3-V LVTTL"))
]

# Platform -----------------------------------------------------------------------------------------

class Platform(AlteraPlatform):
    default_clk_name   = "clk50"
    default_clk_period = 1e9/50e6
    create_rbf         = False

    def __init__(self, toolchain="quartus"):
        AlteraPlatform.__init__(self, "10M50DAF484C7G", _io, toolchain=toolchain)
        self.add_platform_command("set_global_assignment -name FAMILY \"MAX 10\"")
        self.add_platform_command("set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF")
        self.add_platform_command("set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"SINGLE IMAGE WITH ERAM\"")

    def create_programmer(self):
        return USBBlaster()

    def do_finalize(self, fragment):
        AlteraPlatform.do_finalize(self, fragment)
        self.add_period_constraint(self.lookup_request("clk10",    loose=True), 1e9/10e6)
        self.add_period_constraint(self.lookup_request("clk50", 0, loose=True), 1e9/50e6)
        self.add_period_constraint(self.lookup_request("clk50", 1, loose=True), 1e9/50e6)

# Design -------------------------------------------------------------------------------------------

class HexDisp(Module, AutoCSR):
      def __init__(self, output_hex0, output_hex1):
        self.hex0 = CSRStorage(8)
        self.hex1 = CSRStorage(8)

        self.output_hex0 = output_hex0
        self.output_hex1 = output_hex1

        self.comb += self.output_hex0.eq(self.hex0.storage)
        self.comb += self.output_hex1.eq(self.hex1.storage)

def disp(hex, line):
       print("")

def HexDisp_test(dut):
    yield dut.hex0.storage.eq(153)
    yield dut.hex1.storage.eq(153)
    yield
 
    number = (yield dut.output_hex0)
    string = f'{number}'
    hex_0=int(string)
    number = (yield dut.output_hex1)
    string = f'{number}'
    hex_1=int(string)

    for x in range(5):
       disp(hex_0,x)
       disp(hex_1,x)
       print("")

# Build --------------------------------------------------------------------------------------------
if __name__ == "__main__":
    platform = Platform()
    hex0 = platform.request("seven_seg",0)
    hex1 = platform.request("seven_seg",1)

    module=HexDisp(hex0, hex1)
    run_simulation(module, HexDisp_test(module))
```
## Tasks

Copy and paste a definition of disp(hex, line) from previous lab, then run source code. You should see drawen 44 in the terminal, just like below.
```
      
| || |
 -  - 
  |  |
      

```

Module uses only 2 displays, extend the module to use 6 displays. Then change code in **HexDisp_test(dut)** to use 6 displays and set todays date in registers. Remember to add **platform.request** for rest of the displays and edit penultimate line of code.